The invention relates to a discharge circuit for the integrating capacitor of an integrating amplifier with capacitative feedback.
When currents or voltages are integrated with respect to time in accordance with the well known principle of the amplifier with capacitative feedback, the integral is available at the amplifier output in the form of a voltage. When a measuring signal is applied, the voltage therefore increases with the measuring time so that given a correspondingly long measuring time and a low capacitance of the integrating capacitor or a small time constant of the integrating element, it is possible in theory to achieve voltage values of any desired magnitude. In practice, however, the ultimate output voltage swing of the amplifiers seldom exceeds 100 V and therefore imposes limits which must not be exceeded or must be taken into account when dimensioning the integrating capacitor or the time constant of the integrating element. A large measuring signal or a long measuring time results in a large capacitance value of the integrating capacitor or in a large time constant of the integrating element.
Precise measurements with a high resolution in voltage terms of the integral and a wide dynamic measuring range call for a low capacitance value of the integrating capacitor or for a small time constant of the integrating element so that the integrating capacitor must be discharged during the measuring procedure in the case of large measuring signals or prolonged measuring procedures after reaching the maximum output voltage of the appropriate amplifier type and the number of discharges must be counted. No integration of the measuring signal takes place during the discharge time, so that the actual integration time is shortened and a measuring error is produced. The measuring error becomes smaller in accordance with the briefness of the discharge time which can be obtained in relation to the integrating time. Given integrating times in the seconds and milliseconds range, it may be necessary to provide discharge times of a few milliseconds or microseconds.
To detect the change of a signal with respect to time, it is advantageous for many measuring problems, but more particularly when measuring small signals, to integrate the measured signal in interval steps. If the signal characteristic calls for a high resolution in terms of time, it means that only very short integration intervals are possible for a high measuring signal rate. The measuring rate becomes very high so that the individual amplitude values can be stored and evaluated only by digital data logging systems. Owing to the short integration times, the accuracy of this measuring method is defined substantially by the accuracy of the integration interval, i.e. by the timing precision with which the integration beginning and end is controlled. Control accuracies in the microsecond or nanosecond range may be necessary for integrationtimes in the millisecond and microsecond range.
In addition to a suitable choice of integrating amplifier and integrating capacitor, it is the embodiment of the discharge procedure and discharge control of the integration capacitor which decide the feasibility of these integrating processes and the accuracy and reproducibility of the measured results.
In conventional processes the integrating capacitor is discharged by a parallel-connected, electrically controllable switch. This must take account of different circumstances.
During the discharge procedure the switch must have a low resistance so that the integrating capacitor is rapidly discharged and the current to be integrated, and then flows through the switch, does not produce a voltage drop across the switch and therefore also not across the integration capacitor which would cause the latter to receive an initial charge that would falsify the result of the next integration procedure.
During the integrating procedure the switch must also have a high resistance so that the integrating capacitor is not provided with a shunt which would result in branching of the current or discharging of the integrating capacitor and thus produce a measuring error. The fault current of the switch on the other hand must be small in terms of the lowest current to be integrated and which in practice can amount to 1 pA and less.
Furthermore, the switch must be arranged so that it can be controlled without delay and chatter so that specified integration times or integration intervals can be exactly maintained.
Furthermore the control pulse of the switch must not induce or influence a charge in the integrating capacitor. No residual voltage must remain on the switch despite dynamic low-resistance characteristics. Finally, the switch should be capable of providing bipolar performance.
The most important technical data of known switches are listed in the Table below:
__________________________________________________________________________ R.sub.in or R.sub.out Control resid- or pulse ual fault Interval delay Integration trans- bi- Switch voltage current in out time error mission point __________________________________________________________________________ Reed 0.1.OMEGA. 10 T.OMEGA. 0.5ms 0.3ms 0.2 ms screen- yes relay + 0.2 ms chatter time Trans- istor 10 mV 10 nA 15 ns 5 .mu.s 5 .mu.s avail- able no Trans- 50 mV 30 nA 15 ns 15 ns 5ns avail- istor able no with diode FET 50.OMEGA. 5 nA 1 .mu.s 0.5 .mu.s 0.5 .mu.s avail- Switch able no __________________________________________________________________________
The advantages and disadvantages of the individual switches are approximately uniformly distributed over all switches and depending on the measuring conditions have different significance for the accuracy of the measured result. However, compromise solutions must be adopted if stringent requirements are made on the versatility and accuracy of the integrator because no switch is capable of fulfilling all requirements.
The object of the present invention is to avoid the inadequacies of known discharge circuits and to provide a discharge circuit of the kind mentioned initially in which the disadvantages due to the components are avoided substantially by circuit means to obtain optimum data for the switching device.